NOP |
00 |
0000 |
CO|MI |
RO|II|CE |
0 |
0 |
0 |
0000 XXXX |
No operation |
LDA |
01 |
0001 |
CO|MI |
RO|II|CE |
IO|MI |
RO|AI |
0 |
0001 AAAA |
Load contents of memory address AAAA into A register |
ADD |
02 |
0010 |
CO|MI |
RO|II|CE |
IO|MI |
RO|BI |
EO|AI|FI |
0010 AAAA |
Load memory[AAAA] into B, add A + B, store result in A |
SUB |
03 |
0011 |
CO|MI |
RO|II|CE |
IO|MI |
RO|BI |
EO|AI|SU|FI |
0011 AAAA |
Load memory[AAAA] into B, subtract B from A, store result in A
|
STA |
04 |
0100 |
CO|MI |
RO|II|CE |
IO|MI |
AO|RI |
0 |
0100 AAAA |
Store contents of A at memory address AAAA |
LDI |
05 |
0101 |
CO|MI |
RO|II|CE |
IO|AI |
0 |
0 |
0101 VVVV |
Load immediate 4-bit value VVVV into A register |
JMP |
06 |
0110 |
CO|MI |
RO|II|CE |
IO|J |
0 |
0 |
0110 AAAA |
Unconditional jump to address AAAA |
JC |
07 |
0111 |
CO|MI |
RO|II|CE |
IO|J |
0 |
0 |
0111 AAAA |
Jump to AAAA if carry flag is set |
JZ |
08 |
1000 |
CO|MI |
RO|II|CE |
IO|J |
0 |
0 |
1000 AAAA |
Jump to AAAA if zero flag is set |
|
09 |
1001 |
CO|MI |
RO|II|CE |
0 |
0 |
0 |
|
— |
|
10 |
1010 |
CO|MI |
RO|II|CE |
0 |
0 |
0 |
|
— |
|
11 |
1011 |
CO|MI |
RO|II|CE |
0 |
0 |
0 |
|
— |
|
12 |
1100 |
CO|MI |
RO|II|CE |
0 |
0 |
0 |
|
— |
|
13 |
1101 |
CO|MI |
RO|II|CE |
0 |
0 |
0 |
|
— |
OUT |
14 |
1110 |
CO|MI |
RO|II|CE |
AO|OI |
0 |
0 |
1110 XXXX |
Output contents of A to 7-segment display |
HLT |
15 |
1111 |
CO|MI |
RO|II|CE |
HLT |
0 |
0 |
1111 XXXX |
Halt execution |